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  2SK4101LS rev.0 i page 1 of 5 i www.onsemi.com features low on-resistance, low input capacitance, ultrahigh-speed switching. high reliability (adoption of hvp process). attachment workability is good by mica-less package. a valanche resistance guarantee. specifications absolute maximum ratings at ta=25 c parameter symbol conditions ratings unit drain-to-source voltage v dss 650 v gate-to-source voltage v gss 30 v drain current (dc) i dc *1 limited only by maximum temperature 7 a i dpack *2 t c=25 c (sanyos ideal heat dissipation condition)*3 6.4 a drain current (pulse) i dp pw 10 s, duty cycle 1% 28 a allowable power dissipation p d 2.0 w t c=25 c (sanyos ideal heat dissipation condition)*3 35 w channel temperature tch 150 c storage temperature tstg - -55 to +150 c a valanche energy (single pulse) *4 e as 289 mj a valanche current *5 i av 7a * 1 shows chip capability * 2 package limited * 3 sanyo s condition is radiation from backside. the method is applying silicone grease to the backside of the device and attaching the device to water-cooled radiator made of aluminium. * 4 v dd =99v, l=10mh, i av =7a * 5 l 10mh, single pulse marking : k4101 ordering number : ena0745a 2SK4101LS n-channel silicon mosfet general-purpose switching device applications ? 2011, scillc. all rights reserved. jan-2011, rev. 0 www.onsemi.com publication order number: 2SK4101LS/d
2SK4101LS rev.0 i page 2 of 5 i www.onsemi.com electrical characteristics at ta=25 c ratings parameter symbol conditions min typ max unit drain-to-source breakdown voltage v (br)dss i d =10ma, v gs =0v 650 v zero-gate voltage drain current i dss v ds =520v, v gs =0v 100 a gate-to-source leakage current i gss v gs = 30v, v ds =0v 100 na cutoff voltage v gs (off) v ds =10v, i d =1ma 3 5 v forward transfer admittance ? yfs ? v ds =10v, i d =3.5a 2.3 4.6 s static drain-to-source on-state resistance r ds (on) i d =3.5a, v gs =10v 0.85 1.1 ? input capacitance ciss v ds =30v, f=1mhz 750 pf output capacitance coss v ds =30v, f=1mhz 136 pf reverse transfer capacitance crss v ds =30v, f=1mhz 28 pf t urn-on delay time t d (on) see specified test circuit. 21 ns rise time t r see specified test circuit. 40 ns t urn-off delay time t d (off) see specified test circuit. 89 ns fall time t f see specified test circuit. 31 ns t otal gate charge qg v ds =200v, v gs =10v, i d =7a 28.5 nc gate-to-source charge qgs v ds =200v, v gs =10v, i d =7a 5.2 nc gate-to-drain ?iller?charge qgd v ds =200v, v gs =10v, i d =7a 16 nc diode forward voltage v sd i s =7a, v gs =0v 0.9 1.2 v package dimensions unit : mm (typ) 7509-002 switching time test circuit avalanche resistance test circuit 16.0 14.0 3.6 3.5 7.2 16.1 0.7 2.55 2.55 2.4 1.2 0.9 0.75 0.6 1.2 4.5 2.8 123 10.0 3.2 1 : gate 2 : drain 3 : source sanyo : to-220fi(ls) pw=10 s d.c. 0.5% p. g r gs =50 ? g s d i d =3.5a r l =57 ? v dd =200v v out 2SK4101LS v in 10v 0v v in 50 ? 50 ? rg v dd l 10v 0v 2SK4101LS
2SK4101LS rev.0 i page 3 of 5 i www.onsemi.com drain-to-source voltage, v ds -- v drain current, i d -- a gate-to-source voltage, v gs -- v drain current, i d -- a static drain-to-source on-state resistance, r ds (on) -- ? static drain-to-source on-state resistance, r ds (on) -- ? case temperature, tc -- c drain current, i d -- a forward transfer admittance, ? y fs ? -- s diode forward voltage, v sd -- v source current, i s -- a gate-to-source voltage, v gs -- v i d -- v ds i d -- v gs r ds (on) -- v gs r ds (on) -- tc i s -- v sd ? y fs ? -- i d drain current, i d -- a switching time, sw time -- ns sw time -- i d drain-to-source voltage, v ds -- v ciss, coss, crss -- pf ciss, coss, crss -- v ds it12219 it12216 - -50 --25 150 it12221 1.4 0.8 1.0 1.2 0.4 0.6 0.2 0.01 0.1 5 7 3 2 2 1.0 5 7 3 2 10 5 7 3 3 2 025507 5 100 125 i d = 3.5 a -- 25 c 25 c tc= 75 c tc= 75 c 25 c -- 25 c v gs =0v it12223 020 10 30 100 1000 5 2 3 10 2 3 5 2 3 5 7 7 f=1mhz 10 5152030 25 0 0 5 25 15 10 20 it12218 5.5 6.0 6.5 7.0 7.5 10 8.0 8.5 9.0 9.5 5.0 0 0.5 1.0 3.0 1.5 2.5 2.0 0 0.5 1.0 3.0 2.5 2.0 1.5 t c=25 c v gs =5v 10v 15v i d =3.5 a, v gs =10v 8v 50 40 ciss crss coss 0.1 1.0 23 2 57 23 57 3 10 100 10 7 5 3 2 7 3 5 2 it12222 t d (off) t d (on) v dd =200v v gs =10v t f t r 6v 25 c 75 c t c= -- 25 c it12217 6 4 2810 20 12 14 16 18 0 0 5 25 15 20 10 v ds =20v it12220 0.1 23 57 3 1.0 2 7 5 2 2 3 3 7 10 5 2 1.0 10 357 235 t c= - -25 c 25 c 75 c v ds =20v
2SK4101LS rev.0 i page 4 of 5 i www.onsemi.com t otal gate charge, qg -- nc gate-to-source voltage, v gs -- v drain-to-source voltage, v ds -- v drain current, i d -- a ambient temperature, ta -- c allowable power dissipation, p d -- w case temperature, tc -- c allowable power dissipation, p d -- w a s o v gs -- qg p d -- ta p d -- tc e as -- ta a valanche energy derating factor -- % ambient temperature, ta -- c 0 0 20 40 60 80 100 120 2.5 140 160 2.0 1.5 1.0 0.5 it12226 it12225 0.01 0.1 2 3 5 7 2 1.0 3 5 7 2 0.1 10 s 100 s 100ms 10ms 1ms dc operation 1.0 10 100 23 57 23 57 7 2 1000 35 2357 10 3 5 7 7 2 3 5 0 0 20 40 60 80 100 140 120 20 25 30 35 15 10 5 40 160 it12227 030 20 10 3 10 0 1 4 it12224 8 9 5 6 7 2 0 0 25 50 75 100 125 150 100 80 60 20 40 120 175 it10478 i dc (*1)=7a i dpack (*2)=6.4a v ds =200v i d =7 a operation in this area is limited by r ds (on). i dp =28a pw 10 s t c=25 c single pulse * 1. shows chip capability * 2. sanyo's ideal heat dissipation condition
2SK4101LS rev.0 i page 5 of 5 i www.onsemi.com 2SK4101LS/d   
   
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on semiconductor and the on logo are registered trademarks of semiconductor components industries, llc (scillc). scillc reserve s the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any partic ular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitatio n special, consequential or incidental damages. scillc strives to supply high-quality high-reliability products and recommends adopting safety measures when designing equipment to avoid accidents or m alfunctions. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. "typical" parameter s which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including "typic als," must be validated for each customer application by customer? technical experts. scillc shall not be held liable for any claim or suits with regard to a third party? intellectual property rights which has resulted from the use of the technical information and products mentioned above. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any o ther application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or u nauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affi liates, and distributors harmless against all claims, costs, damages, and expen ses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affi rmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner.


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